FPGA Engineer

Edinburgh

About this Position:

We are seeking an experienced Senior / Principal FPGA Engineer to join a dynamic team working on cutting-edge systems within the aerospace and defence industry. This role focuses on designing and developing FPGA solutions using VHDL, while verifying designs using VHDL or System Verilog. The engineer will collaborate closely with Systems, Hardware, and Software teams to deliver innovative solutions and resolve integration challenges in complex systems.

Job Responsibilities:

  • Develop innovative and robust FPGA designs using VHDL.
  • Verify FPGA designs using VHDL or System Verilog.
  • Document and maintain records of design deliverables.
  • Manage FPGA designs under version and revision control.
  • Analyse system and hardware-level requirements to derive detailed FPGA requirements.
  • Debug FPGA designs and support integration and verification at both hardware and system levels.
  • Collaborate with cross-functional teams to resolve integration issues.
  • Specify timing and area constraints for efficient FPGA place and route.
  • Provide regular progress reports to Project Engineering Leads.

Experience Required:

  • A minimum of 5 years of FPGA development experience using VHDL or Verilog.
  • Proficiency with Mentor Graphics FPGA tools, including HDL Designer, ModelSim/Questa, and Precision.
  • Experience with Xilinx, Intel (Altera), or Microsemi (Actel) FPGA design flows (ISE, Vivado, Quartus) and third-party synthesis tools.
  • Independent verification of FPGA designs using VHDL.
  • Proficiency in FPGA requirements capture and version/revision control tools.
  • Experience in debugging FPGA designs and working with high-speed serial protocols.
  • Strong communication and interpersonal skills, with a proven ability to coordinate technical activities.
  • Linux and scripting experience.

Additional Information:

  • UK citizenship is required to obtain Security Clearance (SC).
  • Current valid SC clearance is advantageous.

Apply on scotjobsnet.co.uk

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